These macros let you describe the relative speed of various operations on the target machine.
CONST_COSTS (x, code, outer_code)
switch
statement that describes the relative costs
of constant RTL expressions. It must contain case
labels for
expression codes const_int
, const
, symbol_ref
,
label_ref
and const_double
. Each case must ultimately
reach a return
statement to return the relative cost of the use
of that kind of constant value in an expression. The cost may depend on
the precise value of the constant, which is available for examination in
x, and the rtx code of the expression in which it is contained,
found in outer_code.
code is the expression code--redundant, since it can be
obtained with GET_CODE (x)
.
RTX_COSTS (x, code, outer_code)
CONST_COSTS
but applies to nonconstant RTL expressions.
This can be used, for example, to indicate how costly a multiply
instruction is. In writing this macro, you can use the construct
COSTS_N_INSNS (n)
to specify a cost equal to n fast
instructions. outer_code is the code of the expression in which
x is contained.
This macro is optional; do not define it if the default cost assumptions
are adequate for the target machine.
ADDRESS_COST (address)
CONST_COSTS
values.
For most CISC machines, the default cost is a good approximation of the
true cost of the addressing mode. However, on RISC machines, all
instructions normally have the same length and execution time. Hence
all addresses will have equal costs.
In cases where more than one form of an address is known, the form with
the lowest cost will be used. If multiple forms have the same, lowest,
cost, the one that is the most complex will be used.
For example, suppose an address that is equal to the sum of a register
and a constant is used twice in the same basic block. When this macro
is not defined, the address will be computed in a register and memory
references will be indirect through that register. On machines where
the cost of the addressing mode containing the sum is no higher than
that of a simple indirect reference, this will produce an additional
instruction and possibly require an additional register. Proper
specification of this macro eliminates this overhead for such machines.
Similar use of this macro is made in strength reduction of loops.
address need not be valid as an address. In such a case, the cost
is not relevant and can be any value; invalid addresses need not be
assigned a different cost.
On machines where an address involving more than one register is as
cheap as an address computation involving only one register, defining
ADDRESS_COST
to reflect this can cause two registers to be live
over a region of code where only one would have been if
ADDRESS_COST
were not defined in that manner. This effect should
be considered in the definition of this macro. Equivalent costs should
probably only be given to addresses with different numbers of registers
on machines with lots of registers.
This macro will normally either not be defined or be defined as a
constant.
REGISTER_MOVE_COST (from, to)
GENERAL_REGS
. A value of 2 is the
default; other values are interpreted relative to that.
It is not required that the cost always equal 2 when from is the
same as to; on some machines it is expensive to move between
registers if they are not general registers.
If reload sees an insn consisting of a single set
between two
hard registers, and if REGISTER_MOVE_COST
applied to their
classes returns a value of 2, reload does not check to ensure that the
constraints of the insn are met. Setting a cost of other than 2 will
allow reload to verify that the constraints are met. You should do this
if the `movm' pattern's constraints do not allow such copying.
MEMORY_MOVE_COST (m)
REGISTER_MOVE_COST
.
If moving between registers and memory is more expensive than between
two registers, you should define this macro to express the relative cost.
BRANCH_COST
Here are additional macros which do not specify precise relative costs, but only that certain actions are more expensive than GNU CC would ordinarily expect.
SLOW_BYTE_ACCESS
char
or a short
) is no
faster than accessing a word of memory, i.e., if such access
require more than one instruction or if there is no difference in cost
between byte and (aligned) word loads.
When this macro is not defined, the compiler will access a field by
finding the smallest containing object; when it is defined, a fullword
load will be used if alignment permits. Unless bytes accesses are
faster than word accesses, using word accesses is preferable since it
may eliminate subsequent memory access if subsequent accesses occur to
other fields in the same word of the structure, but to different bytes.
SLOW_ZERO_EXTEND
char
or short
to an int
) can be done faster if the destination is a register
that is known to be zero.
If you define this macro, you must have instruction patterns that
recognize RTL structures like this:
(set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)and likewise for
HImode
.
SLOW_UNALIGNED_ACCESS
STRICT_ALIGNMENT
were non-zero when generating code for block
moves. This can cause significantly more instructions to be produced.
Therefore, do not set this macro non-zero if unaligned accesses only add a
cycle or two to the time for a memory access.
If the value of this macro is always zero, it need not be defined.
DONT_REDUCE_ADDR
MOVE_RATIO
NO_FUNCTION_CSE
NO_RECURSIVE_FUNCTION_CSE
ADJUST_COST (insn, link, dep_insn, cost)
ADJUST_PRIORITY (insn)
INSN_PRIORITY(insn)
. Reduce the priority
to execute the insn earlier, increase the priority to execute
insn later. Do not define this macro if you do not need to
adjust the scheduling priorities of insns.
Go to the first, previous, next, last section, table of contents.