Here are several miscellaneous parameters.
PREDICATE_CODES
#define PREDICATE_CODES \ {"gen_reg_rtx_operand", {SUBREG, REG}}, \ {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},Defining this macro does not affect the generated code (however, incorrect definitions that omit an rtl code that may be matched by the predicate can cause the compiler to malfunction). Instead, it allows the table built by `genrecog' to be more compact and efficient, thus speeding up the compiler. The most important predicates to include in the list specified by this macro are thoses used in the most insn patterns.
CASE_VECTOR_MODE
CASE_VECTOR_PC_RELATIVE
CASE_DROPS_THROUGH
case
insn when the index
value is out of range. This means the specified default-label is
actually ignored by the case
insn proper.
CASE_VALUES_THRESHOLD
casesi
instruction and
five otherwise. This is best for most machines.
WORD_REGISTER_OPERATIONS
LOAD_EXTEND_OP (mode)
SIGN_EXTEND
for values
of mode for which the
insn sign-extends, ZERO_EXTEND
for which it zero-extends, and
NIL
for other modes.
This macro is not called with mode non-integral or with a width
greater than or equal to BITS_PER_WORD
, so you may return any
value in this case. Do not define this macro if it would always return
NIL
. On machines where this macro is defined, you will normally
define it as the constant SIGN_EXTEND
or ZERO_EXTEND
.
SHORT_IMMEDIATES_SIGN_EXTEND
IMPLICIT_FIX_EXPR
FIX_ROUND_EXPR
is used.
FIXUNS_TRUNC_LIKE_FIX_TRUNC
EASY_DIV_EXPR
TRUNC_DIV_EXPR
, FLOOR_DIV_EXPR
, CEIL_DIV_EXPR
or
ROUND_DIV_EXPR
. These four division operators differ in how
they round the result to an integer. EASY_DIV_EXPR
is used
when it is permissible to use any of those kinds of division and the
choice should be made on the basis of efficiency.
MOVE_MAX
MAX_MOVE_MAX
MOVE_MAX
. Otherwise, it is the
constant value that is the largest value that MOVE_MAX
can have
at run-time.
SHIFT_COUNT_TRUNCATED
SHIFT_COUNT_TRUNCATED
also enables deletion of truncations of the values that serve as
arguments to bitfield instructions.
If both types of instructions truncate the count (for shifts) and
position (for bitfield operations), or if no variable-position bitfield
instructions exist, you should define this macro.
However, on some machines, such as the 80386 and the 680x0, truncation
only applies to shift operations and not the (real or pretended)
bitfield operations. Define SHIFT_COUNT_TRUNCATED
to be zero on
such machines. Instead, add patterns to the `md' file that include
the implied truncation of the shift instructions.
You need not define this macro if it would always have the value of zero.
TRULY_NOOP_TRUNCATION (outprec, inprec)
TRULY_NOOP_TRUNCATION
returns 1 for a pair of sizes for
modes for which MODES_TIEABLE_P
is 0, suboptimal code can result.
If this is the case, making TRULY_NOOP_TRUNCATION
return 0 in
such cases may improve things.
STORE_FLAG_VALUE
MODE_INT
mode.
A value of 1 or -1 means that the instruction implementing the
comparison operator returns exactly 1 or -1 when the comparison is true
and 0 when the comparison is false. Otherwise, the value indicates
which bits of the result are guaranteed to be 1 when the comparison is
true. This value is interpreted in the mode of the comparison
operation, which is given by the mode of the first operand in the
`scond' pattern. Either the low bit or the sign bit of
STORE_FLAG_VALUE
be on. Presently, only those bits are used by
the compiler.
If STORE_FLAG_VALUE
is neither 1 or -1, the compiler will
generate code that depends only on the specified bits. It can also
replace comparison operators with equivalent operations if they cause
the required bits to be set, even if the remaining bits are undefined.
For example, on a machine whose comparison operators return an
SImode
value and where STORE_FLAG_VALUE
is defined as
`0x80000000', saying that just the sign bit is relevant, the
expression
(ne:SI (and:SI x (const_int power-of-2)) (const_int 0))can be converted to
(ashift:SI x (const_int n))where n is the appropriate shift count to move the bit being tested into the sign bit. There is no way to describe a machine that always sets the low-order bit for a true value, but does not guarantee the value of any other bits, but we do not know of any machine that has such an instruction. If you are trying to port GNU CC to such a machine, include an instruction to perform a logical-and of the result with 1 in the pattern for the comparison operators and let us know (see section How to Report Bugs). Often, a machine will have multiple instructions that obtain a value from a comparison (or the condition codes). Here are rules to guide the choice of value for
STORE_FLAG_VALUE
, and hence the instructions
to be used:
STORE_FLAG_VALUE
. It is more efficient for the compiler to
"normalize" the value (convert it to, e.g., 1 or 0) than for the
comparison operators to do so because there may be opportunities to
combine the normalization with other operations.
STORE_FLAG_VALUE
and its negation in the same number of
instructions. On those machines, you should also define a pattern for
those cases, e.g., one matching
(set A (neg:m (ne:m B C)))Some machines can also perform
and
or plus
operations on
condition code values with less instructions than the corresponding
`scond' insn followed by and
or plus
. On those
machines, define the appropriate patterns. Use the names incscc
and decscc
, respectively, for the patterns which perform
plus
or minus
operations on condition code values. See
`rs6000.md' for some examples. The GNU Superoptizer can be used to
find such instruction sequences on other machines.
You need not define STORE_FLAG_VALUE
if the machine has no store-flag
instructions.
FLOAT_STORE_FLAG_VALUE
Pmode
SImode
on 32-bit machine or DImode
on 64-bit machines.
On some machines you must define this to be one of the partial integer
modes, such as PSImode
.
The width of Pmode
must be at least as large as the value of
POINTER_SIZE
. If it is not equal, you must define the macro
POINTERS_EXTEND_UNSIGNED
to specify how pointers are extended
to Pmode
.
FUNCTION_MODE
call
RTL expressions. On most machines this
should be QImode
.
INTEGRATE_THRESHOLD (decl)
FUNCTION_DECL
node.
The default definition of this macro is 64 plus 8 times the number of
arguments that the function accepts. Some people think a larger
threshold should be used on RISC machines.
SCCS_DIRECTIVE
#sccs
directives
and print no error message.
NO_IMPLICIT_EXTERN_C
HANDLE_PRAGMA (stream, node)
#pragma
.
It is generally a bad idea to implement new uses of #pragma
. The
only reason to define this macro is for compatibility with other
compilers that do support #pragma
for the sake of any user
programs which already use it.
VALID_MACHINE_DECL_ATTRIBUTE (decl, attributes, identifier, args)
VALID_MACHINE_TYPE_ATTRIBUTE (type, attributes, identifier, args)
COMP_TYPE_ATTRIBUTES (type1, type2)
SET_DEFAULT_TYPE_ATTRIBUTES (type)
DOLLARS_IN_IDENTIFIERS
NO_DOLLAR_IN_LABEL
NO_DOT_IN_LABEL
DEFAULT_MAIN_RETURN
main
function to return a standard "success" value by default (if no other
value is explicitly returned).
The definition should be a C statement (sans semicolon) to generate the
appropriate rtl instructions. It is used only when compiling the end of
main
.
HAVE_ATEXIT
atexit
from the ANSI C standard. If this is not defined,
and INIT_SECTION_ASM_OP
is not defined, a default
exit
function will be provided to support C++.
EXIT_BODY
exit
function needs to do something
besides calling an external function _cleanup
before
terminating with _exit
. The EXIT_BODY
macro is
only needed if netiher HAVE_ATEXIT
nor
INIT_SECTION_ASM_OP
are defined.
INSN_SETS_ARE_DELAYED (insn)
jump_insn
or an insn
; GNU CC knows that
every call_insn
has this behavior. On machines where some insn
or jump_insn
is really a function call and hence has this behavior,
you should define this macro.
You need not define this macro if it would always return zero.
INSN_REFERENCES_ARE_DELAYED (insn)
jump_insn
or an insn
. On machines where
some insn
or jump_insn
is really a function call and its operands
are registers whose use is actually in the subroutine it calls, you should
define this macro. Doing so allows the delay slot scheduler to move
instructions which copy arguments into the argument registers into the delay
slot of insn.
You need not define this macro if it would always return zero.
MACHINE_DEPENDENT_REORG (insn)
MULTIPLE_SYMBOL_SPACES
GIV_SORT_CRITERION (giv1, giv2)
ISSUE_RATE
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