Nueron - Processor Comparison

The following table provides a comparison between ColdFire and other processors which have been suggested by people as a better alternative. Hopefully, this information will help them understand why ColdFire was chosen.

Processor Comparison

1. Dhrystone 2.1 MIPS.

2. Verification of information pending.

3. Low power version of PPC7447.

• Architecture & Code Density
  ColdFire is defined as VL(variable length)RISC where instruction lengths can vary between two, four or six bytes (most are two). Other RISC processors, such as PowerPC, use a fixed instruction length of four bytes giving ColdFire processors a higher relative code density. PowerPC, ARM and ColdFire benefit from a number of general purpose registers. IA32 processors lack these registers, which results in increased code size and stack usage thereby requiring larger caches to compensate.

  Also, higher code density results in smaller executable and shared resource files stored on secondary storage media. This benefit is more apparent in embedded designs with limited storage space.

• Power Consumption
  Power conservation is a primary goal of the Nueron architecture. With the exception of XScale(ARM), ColdFire provides one of the lowest power per megahertz scores. IA32 architecture devices are extremely inefficient. The deep-sleep mode of the Pentium mobile is a joke (in deep-sleep mode it draws as much power as the entire Nueron1200 board without CCFL!). Also, ColdFire power consumption includes integrated modules such as the memory controller which is an additional source for most others.

  Another goal for Nueron devices is to have no moving parts and this includes fans. Higher powered processors possibly used in a Nueron PAD would most likely require a fan since airflow is restricted.

• Speed
  The ColdFire is by no means the fastest processor around, however the 5407 isn't too bad in the MIPS/Mhz score. We must consider that the 5407 core is not fully superscalar (CF5 cores will be) and that its bus is 32-bit wide compared to PowerPC and Athlon/Pentium processors (which are 64-bit). Why isn't this score worse? The answer is simple. A typical instruction length of two bytes on a 32-bit bus yields 2 instructions per bus width, the same as with PowerPC (four bytes per 64-bit).

  However, cached code and data will have full speed access and here the ColdFire lags behind because of a slower core clock speed.

• Internal SRAM
  Most ColdFire processors contain internal static memory that operate at the core clock speed and provide space for critical code/data. This memory is not affected by cache flushes and therefore can be used to hold interrupt code for example.

Future ColdFire Cores

Conclusion